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"A hierarchical approach to transistor-level power estimation of arithmetic ..."

Janardhan H. Satyanarayana, Keshab K. Parhi (1996)

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DOI: 10.1109/ICASSP.1996.550592

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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  dblp key:
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  persistent URL:
  - https://dblp.org/rec/conf/icassp/SatyanarayanaP96
Janardhan H. Satyanarayana, Keshab K. Parhi:
A hierarchical approach to transistor-level power estimation of arithmetic units. ICASSP 1996: 3338-3341

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