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"Pruning Binarized Neural Networks Enables Low-Latency, Low-Power ..."

Syamantak Payra et al. (2023)

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DOI: 10.1109/HPEC58863.2023.10363509

access: closed

type: Conference or Workshop Paper

metadata version: 2024-01-22

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  dblp key:
  - conf/hpec/PayraLFS23
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Syamantak Payra, Gabriel Loke, Yoel Fink, Joseph D. Steinmeyer:
Pruning Binarized Neural Networks Enables Low-Latency, Low-Power FPGA-Based Handwritten Digit Classification. HPEC 2023: 1-8

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