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"Tiered-latency DRAM: A low latency and low cost DRAM architecture."

Donghyuk Lee et al. (2013)

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DOI: 10.1109/HPCA.2013.6522354

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  persistent URL:
  - https://dblp.org/rec/conf/hpca/LeeKSLSM13
Donghyuk Lee, Yoongu Kim, Vivek Seshadri, Jamie Liu, Lavanya Subramanian, Onur Mutlu:
Tiered-latency DRAM: A low latency and low cost DRAM architecture. HPCA 2013: 615-626

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