"Decoupling processor and memory hierarchy simulators for efficient design ..."

Fatma Jebali et al. (2022)

> Home

Details and statistics

DOI: 10.1145/3522784.3522796

access: closed

type: Conference or Workshop Paper

metadata version: 2022-08-30

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/hipeac/JebaliMWCZ22
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/hipeac/JebaliMWCZ22
Fatma Jebali, Oumaima Matoussi, Arief Wicaksana, Amir Charif, Lilia Zaourar:
Decoupling processor and memory hierarchy simulators for efficient design space exploration. DroneSE/RAPIDO@HiPEAC 2022: 47-52

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.