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"Redundant Arithmetic Based High Speed Carry Free Hybrid Adders with ..."

Ayan Palchaudhuri, Anindya Sundar Dhar (2017)

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DOI: 10.1109/HIPC.2017.00021

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Ayan Palchaudhuri, Anindya Sundar Dhar:
Redundant Arithmetic Based High Speed Carry Free Hybrid Adders with Built-In Scan Chain on FPGAs. HiPC 2017: 104-113

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