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ORCID"New timing and routability driven placement algorithms for FPGA synthesis."
Yue Zhuo et al. (2007)
- Yue Zhuo, Hao Li, Qiang Zhou, Yici Cai, Xianlong Hong:
New timing and routability driven placement algorithms for FPGA synthesis. ACM Great Lakes Symposium on VLSI 2007: 570-575
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