Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"A low power 6t-SRAM using negative bit-line for variability tolerance ..."

Pablo Royer, Marisa López-Vallejo (2013)

> Home

Details and statistics

DOI: 10.1145/2483028.2483056

access: closed

type: Conference or Workshop Paper

metadata version: 2020-10-25

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/glvlsi/RoyerL13
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/glvlsi/RoyerL13
Pablo Royer, Marisa López-Vallejo:
A low power 6t-SRAM using negative bit-line for variability tolerance beyond 22nm node. ACM Great Lakes Symposium on VLSI 2013: 37-42

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.