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"FPGA-based high performance page layout segmentation."
Nalini K. Ratha, Anil K. Jain, Diane T. Rover (1996)
- Nalini K. Ratha, Anil K. Jain, Diane T. Rover:
FPGA-based high performance page layout segmentation. Great Lakes Symposium on VLSI 1996: 29-34
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