"An Architectural Support for Reduction of In-rush Current in Systems with ..."

Sumanta Pyne (2018)

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DOI: 10.1145/3194554.3194645

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-21

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Sumanta Pyne:
An Architectural Support for Reduction of In-rush Current in Systems with Instruction Controlled Power Gating. ACM Great Lakes Symposium on VLSI 2018: 487-490

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