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ORCID"Interconnect delay minimization through interlayer via placement in 3-D ICs."
Vasilis F. Pavlidis, Eby G. Friedman (2005)
- Vasilis F. Pavlidis, Eby G. Friedman:
Interconnect delay minimization through interlayer via placement in 3-D ICs. ACM Great Lakes Symposium on VLSI 2005: 20-25
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