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"Efficient realization of RTD-CMOS logic gates."

Juan Núñez, Maria J. Avedillo, José M. Quintana (2011)

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DOI: 10.1145/1973009.1973090

access: closed

type: Conference or Workshop Paper

metadata version: 2019-10-30

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  - conf/glvlsi/NunezAQ11
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  - https://dblp.org/rec/conf/glvlsi/NunezAQ11
Juan Núñez, Maria J. Avedillo, José M. Quintana:
Efficient realization of RTD-CMOS logic gates. ACM Great Lakes Symposium on VLSI 2011: 387-390

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