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"Macromodeling C- and RC-loaded CMOS inverters for timing analysis."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

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Ayman I. Kayssi (1996)

Trier

Dagstuhl

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DOI: 10.1109/GLSV.1996.497632

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Ayman I. Kayssi:
Macromodeling C- and RC-loaded CMOS inverters for timing analysis. Great Lakes Symposium on VLSI 1996: 272-276

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last updated on 2023-03-24 00:04 CET by the dblp team

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