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"A high-performance VLSI architecture for variable block size motion ..."

Hsin-Chou Chi, Han-Sheng Liu, Hsi-Che Tseng (2014)

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DOI: 10.1109/GCCE.2014.7031303

access: closed

type: Conference or Workshop Paper

metadata version: 2018-02-18

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Hsin-Chou Chi, Han-Sheng Liu, Hsi-Che Tseng:
A high-performance VLSI architecture for variable block size motion estimation. GCCE 2014: 123-124

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