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"FPGA Blokus Duo Solver using a massively parallel architecture."

Takashi Yoza et al. (2013)

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DOI: 10.1109/FPT.2013.6718426

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-24

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  dblp key:
  - conf/fpt/YozaMTKKWFISAYW13
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  - https://dblp.org/rec/conf/fpt/YozaMTKKWFISAYW13
Takashi Yoza, Retsu Moriwaki, Yuki Torigai, Yuki Kamikubo, Takayuki Kubota, Takahiro Watanabe, Takumi Fujimori, Hiroyuki Ito, Masato Seo, Kouta Akagi, Yuichiro Yamaji, Minoru Watanabe:
FPGA Blokus Duo Solver using a massively parallel architecture. FPT 2013: 494-497

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