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"An FPGA-Based Performance Analysis of the Unrolling, Tiling, and ..."

Giacinto Paolo Saggese et al. (2003)

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DOI: 10.1007/978-3-540-45234-8_29

access: closed

type: Conference or Workshop Paper

metadata version: 2021-10-14

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  dblp key:
  - conf/fpl/SaggeseMMS03
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  - https://dblp.org/rec/conf/fpl/SaggeseMMS03
Giacinto Paolo Saggese, Antonino Mazzeo, Nicola Mazzocca, Antonio G. M. Strollo:
An FPGA-Based Performance Analysis of the Unrolling, Tiling, and Pipelining of the AES Algorithm. FPL 2003: 292-302

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