"StencilStream: A SYCL-based Stencil Simulation Framework Targeting FPGAs."

Jan-Oliver Opdenhövel et al. (2024)

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DOI: 10.1109/FPL64840.2024.00023

access: closed

type: Conference or Workshop Paper

metadata version: 2025-03-03

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Jan-Oliver Opdenhövel, Christoph Alt, Christian Plessl, Tobias Kenter:
StencilStream: A SYCL-based Stencil Simulation Framework Targeting FPGAs. FPL 2024: 100-108

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