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"Accelerating SpMV on FPGAs Through Block-Row Compress: A Task-Based Approach."

José Oliver et al. (2023)

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DOI: 10.1109/FPL60245.2023.00029

access: closed

type: Conference or Workshop Paper

metadata version: 2023-11-17

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  dblp key:
  - conf/fpl/OliverACMDA23
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  - https://dblp.org/rec/conf/fpl/OliverACMDA23
José Oliver, Carlos Álvarez, Teresa Cervero, Xavier Martorell, John D. Davis, Eduard Ayguadé:
Accelerating SpMV on FPGAs Through Block-Row Compress: A Task-Based Approach. FPL 2023: 151-158

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