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"Vector FPGA acceleration of 1-D DWT computations using sparse matrix ..."

Sidharth Maheshwari et al. (2016)

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DOI: 10.1109/FPL.2016.7577361

access: closed

type: Conference or Workshop Paper

metadata version: 2017-10-19

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  - conf/fpl/MaheshwariMSK16
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Sidharth Maheshwari, Gourav Modi, Siddhartha, Nachiket Kapre:
Vector FPGA acceleration of 1-D DWT computations using sparse matrix skeletons. FPL 2016: 1-4

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