"An FPGA Prototype for a Multiplierless FIR Filter Built Using the ..."

Peter Lee (1995)

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DOI: 10.1007/3-540-60294-1_124

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-20

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Peter Lee:
An FPGA Prototype for a Multiplierless FIR Filter Built Using the Logarithmic Number System. FPL 1995: 303-310

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