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"An FPGA-Based Low-Latency Accelerator for Randomly Wired Neural Networks."
Ryosuke Kuramochi, Hiroki Nakahara (2020)
- Ryosuke Kuramochi, Hiroki Nakahara:
An FPGA-Based Low-Latency Accelerator for Randomly Wired Neural Networks. FPL 2020: 298-303
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