"A Domain-Specific Architecture for Accelerating Sparse Matrix Vector ..."

Abhishek Kumar Jain et al. (2020)

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DOI: 10.1109/FPL50879.2020.00031

access: closed

type: Conference or Workshop Paper

metadata version: 2021-04-09

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Abhishek Kumar Jain, Hossein Omidian, Henri Fraisse, Mansimran Benipal, Lisa Liu, Dinesh Gaitonde:
A Domain-Specific Architecture for Accelerating Sparse Matrix Vector Multiplication on FPGAs. FPL 2020: 127-132

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