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"Optimizing packet lookup in time and space on FPGA."

Thilan Ganegedara, Viktor K. Prasanna, Gordon J. Brebner (2012)

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DOI: 10.1109/FPL.2012.6339192

access: closed

type: Conference or Workshop Paper

metadata version: 2019-10-19

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Thilan Ganegedara, Viktor K. Prasanna, Gordon J. Brebner:
Optimizing packet lookup in time and space on FPGA. FPL 2012: 270-276

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