"Efficient DVB-T2 decoding accelerator design by time-multiplexing FPGA ..."

Michael Feilen et al. (2012)

Details and statistics

DOI: 10.1109/FPL.2012.6339244

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

a service of  Schloss Dagstuhl - Leibniz Center for Informatics