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"FTDL: An FPGA-tailored Architecture for Deep Learning Systems."

Runbin Shi et al. (2020)

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DOI: 10.1145/3373087.3375384

access: closed

type: Conference or Workshop Paper

metadata version: 2021-05-21

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  dblp key:
  - conf/fpga/ShiDWLSD20
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  - https://dblp.org/rec/conf/fpga/ShiDWLSD20
Runbin Shi, Yuhao Ding, Xuechao Wei, Hang Liu, Hayden Kwok-Hay So, Caiwen Ding:
FTDL: An FPGA-tailored Architecture for Deep Learning Systems. FPGA 2020: 320

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