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"Scalable don't-care-based logic optimization and resynthesis."

Alan Mishchenko et al. (2009)

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DOI: 10.1145/1508128.1508152

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  dblp key:
  - conf/fpga/MishchenkoBJJ09
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  - https://dblp.org/rec/conf/fpga/MishchenkoBJJ09
Alan Mishchenko, Robert K. Brayton, Jie-Hong Roland Jiang, Stephen Jang:
Scalable don't-care-based logic optimization and resynthesis. FPGA 2009: 151-160

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