Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Generation of Synthetic Sequential Benchmark Circuits."

Michael D. Hutton, Jonathan Rose, Derek G. Corneil (1997)

> Home

Details and statistics

DOI: 10.1145/258305.258333

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/fpga/HuttonRC97
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/fpga/HuttonRC97
Michael D. Hutton, Jonathan Rose, Derek G. Corneil:
Generation of Synthetic Sequential Benchmark Circuits. FPGA 1997: 149-155

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.