


default search action
"Energy and Memory Efficient Mapping of Bitonic Sorting on FPGA."
Ren Chen, Sruja Siriyal, Viktor K. Prasanna (2015)
- Ren Chen, Sruja Siriyal, Viktor K. Prasanna:

Energy and Memory Efficient Mapping of Bitonic Sorting on FPGA. FPGA 2015: 240-249

manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.


Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID













