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"Logic circuit design with gates, LUTs and MUXs oriented to mask faults."
Anzhela Yu. Matrosova et al. (2017)
- Anzhela Yu. Matrosova, Sergey Ostanin, D. Tretyakov, Natalia Butorina:
Logic circuit design with gates, LUTs and MUXs oriented to mask faults. EWDTS 2017: 1-4
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