"On the design and FPGA implementation of real-time scanned-array 2D ..."

Arjuna Madanayake, Leonard T. Bruton (2004)

> Home

Details and statistics

DOI: —

access: closed

type: Conference or Workshop Paper

metadata version: 2021-08-09

- view
  - electronic edition @ ieee.org
- export record
  dblp key:
  - conf/eusipco/MadanayakeB04
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/eusipco/MadanayakeB04
Arjuna Madanayake, Leonard T. Bruton:
On the design and FPGA implementation of real-time scanned-array 2D frequency-planar beam filters. EUSIPCO 2004: 2011-2014

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.