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"Sim-async: An Architectural Simulator for Asynchronous Processor Modeling ..."

José Manuel Colmenar et al. (2006)

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DOI: 10.1007/11823285_51

access: closed

type: Conference or Workshop Paper

metadata version: 2022-04-09

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  dblp key:
  - conf/europar/ColmenarGLHML06
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  - https://dblp.org/rec/conf/europar/ColmenarGLHML06
José Manuel Colmenar, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo, Guadalupe Miñana, Sonia López:
Sim-async: An Architectural Simulator for Asynchronous Processor Modeling Using Distribution Functions. Euro-Par 2006: 495-505

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