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"Multi-logic-Unit Processor: A Combinational Logic Circuit Evaluation ..."
Wai Shing Lau et al. (2005)
- Wai Shing Lau, Gang Li, Kin-Hong Lee, Kwong-Sak Leung, Sin Man Cheang:
Multi-logic-Unit Processor: A Combinational Logic Circuit Evaluation Engine for Genetic Parallel Programming. EuroGP 2005: 167-177
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