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"A Real-Time, Analog/Digital Co-Designed 1.89-GHz Bandwidth, 175-kHz ..."

Angie Wang et al. (2018)

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DOI: 10.1109/ESSCIRC.2018.8494317

access: closed

type: Conference or Workshop Paper

metadata version: 2020-03-27

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  dblp key:
  - conf/esscirc/WangBHBROWRAN18
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  - https://dblp.org/rec/conf/esscirc/WangBHBROWRAN18
Angie Wang, Woo-Rham Bae, Jaeduk Han, Stevo Bailey, Paul Rigge, Orhan Ocal, Zhongkai Wang, Kannan Ramchandran, Elad Alon, Borivoje Nikolic:
A Real-Time, Analog/Digital Co-Designed 1.89-GHz Bandwidth, 175-kHz Resolution Sparse Spectral Analysis RISC-V SoC in 16-nm FinFET. ESSCIRC 2018: 322-325

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