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"A 2.7pJ/cycle 16MHz SoC with 4.3nW power-off ARM Cortex-M0+ core in 28nm ..."

Guenole Lallement et al. (2017)

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DOI: 10.1109/ESSCIRC.2017.8094550

access: closed

type: Conference or Workshop Paper

metadata version: 2022-04-09

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  - conf/esscirc/LallementACDRA17
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  - https://dblp.org/rec/conf/esscirc/LallementACDRA17
Guenole Lallement, Fady Abouzeid, Martin Cochet, Jean-Marc Daveau, Philippe Roche, Jean-Luc Autran:
A 2.7pJ/cycle 16MHz SoC with 4.3nW power-off ARM Cortex-M0+ core in 28nm FD-SOI. ESSCIRC 2017: 153-162

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