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"A clock-less low-voltage AES crypto-processor."

G. Fraidy Bouesse et al. (2005)

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DOI: 10.1109/ESSCIR.2005.1541645

access: closed

type: Conference or Workshop Paper

metadata version: 2023-04-28

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  - conf/esscirc/BouesseRWG05
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G. Fraidy Bouesse, Marc Renaudin, Adrien Witon, Fabien Germain:
A clock-less low-voltage AES crypto-processor. ESSCIRC 2005: 403-406

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