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ORCID"Double-gate FinFET process variation aware 10T SRAM cell topology design ..."
Nandakishor Yadav et al. (2013)
- Nandakishor Yadav, Sunil Dutt, Manisha Pattanaik, G. K. Sharma:
Double-gate FinFET process variation aware 10T SRAM cell topology design and analysis. ECCTD 2013: 1-4
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