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"High speed VLSI implementation of a finite field multiplier using ..."

Ashkan Hosseinzadeh Namin et al. (2009)

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DOI: 10.1109/ECCTD.2009.5274961

access: closed

type: Conference or Workshop Paper

metadata version: 2020-11-13

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Ashkan Hosseinzadeh Namin, Karl Leboeuf, Roberto Muscedere, Huapeng Wu, Majid Ahmadi:
High speed VLSI implementation of a finite field multiplier using redundant representation. ECCTD 2009: 161-164

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