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"Timing- / Power-Optimization for Digital Logic Based on Standard Cells."

Heinrich Theodor Vierhaus, Helmut Rossmann, Silvio Misera (2007)

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DOI: 10.1109/DSD.2007.4341484

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-19

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  - conf/dsd/VierhausRM07
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Heinrich Theodor Vierhaus, Helmut Rossmann, Silvio Misera:
Timing- / Power-Optimization for Digital Logic Based on Standard Cells. DSD 2007: 303-306

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