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ORCID"An on Chip Network inside a FPGA for Run-Time Reconfigurable Low Latency ..."
Jochen Strunk et al. (2009)
- Jochen Strunk, Toni Volkmer, Wolfgang Rehm, Heiko Schick:
An on Chip Network inside a FPGA for Run-Time Reconfigurable Low Latency Grid Communication. DSD 2009: 539-546
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