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"Towards a Comprehensive SET Analysis Flow for VLSI Circuits using Static ..."

Christos Georgakidis et al. (2023)

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DOI: 10.1109/DFT59622.2023.10313533

access: closed

type: Conference or Workshop Paper

metadata version: 2024-02-05

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Christos Georgakidis, Dimitris Valiantzas, Stavros Simoglou, Iordanis Lilitsis, Nikolaos Chatzivangelis, Ilias Golfos, Marko S. Andjelkovic, Christos P. Sotiriou, Milos Krstic:
Towards a Comprehensive SET Analysis Flow for VLSI Circuits using Static Timing Analysis. DFT 2023: 1-6

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