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"Design & Simulation of a High Performance Rail-to-Rail CMOS Op-Amp at ..."

Madhu Bhaskaran et al. (2006)

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DOI: 10.1109/DELTA.2006.30

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/delta/BhaskaranSSZ06
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  persistent URL:
  - https://dblp.org/rec/conf/delta/BhaskaranSSZ06
Madhu Bhaskaran, Sharath Sriram, Aleksandar Stojcevski, Aladin Zayegh:
Design & Simulation of a High Performance Rail-to-Rail CMOS Op-Amp at ± 3V Supply. DELTA 2006: 219-222

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