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"Cost-Efficient Synthesis for Sequential Circuits Implemented Using ..."

Grzegorz Borowik, Bogdan J. Falkowski, Tadeusz Luba (2007)

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DOI: 10.1109/DDECS.2007.4295261

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/ddecs/BorowikFL07
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  persistent URL:
  - https://dblp.org/rec/conf/ddecs/BorowikFL07
Grzegorz Borowik, Bogdan J. Falkowski, Tadeusz Luba:
Cost-Efficient Synthesis for Sequential Circuits Implemented Using Embedded Memory Blocks of FPGAs. DDECS 2007: 99-104

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