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"Top-Down Design of a Low-Power Multi-Channel 2.5-Gbit/s/Channel Gated ..."

Paul Muller et al. (2005)

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DOI: 10.1109/DATE.2005.315

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  - https://dblp.org/rec/conf/date/MullerTAL05
Paul Muller, Armin Tajalli, Seyed Mojtaba Atarodi, Yusuf Leblebici:
Top-Down Design of a Low-Power Multi-Channel 2.5-Gbit/s/Channel Gated Oscillator Clock-Recovery Circuit. DATE 2005: 258-263

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