"A layout checking system for large scale integrated circuits."

Kenji Yoshida et al. (1977)

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DOI: —

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type: Conference or Workshop Paper

metadata version: 2012-03-01

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  dblp key:
  - conf/dac/YoshidaMNCON77
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  - https://dblp.org/rec/conf/dac/YoshidaMNCON77
Kenji Yoshida, Takashi Mitsuhashi, Yasuo Nakada, Toshiaki Chiba, Kiyoshi Ogita, Shinji Nakatsuka:
A layout checking system for large scale integrated circuits. DAC 1977: 322-330

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