"Timing analysis for digital fault simulation using assignable delays."

Edward W. Thompson et al. (1974)

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DOI: —

access: closed

type: Conference or Workshop Paper

metadata version: 2012-03-01

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  dblp key:
  - conf/dac/ThompsonSBP74
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  - https://dblp.org/rec/conf/dac/ThompsonSBP74
Edward W. Thompson, Stephen A. Szygenda, N. Billawala, R. Pierce:
Timing analysis for digital fault simulation using assignable delays. DAC 1974: 266-272

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