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"A layout system for the random logic portion of MOS LSI."

Isao Shirakawa et al. (1980)

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DOI: 10.1145/800139.804517

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  - conf/dac/ShirakawaOHTO80
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  - https://dblp.org/rec/conf/dac/ShirakawaOHTO80
Isao Shirakawa, Noboru Okuda, Takashi Harada, Sadahiro Tani, Hiroshi Ozaki:
A layout system for the random logic portion of MOS LSI. DAC 1980: 92-99

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