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"Sequential equivalence checking of clock-gated circuits."

Yu-Yun Dai, Kei-Yong Khoo, Robert K. Brayton (2015)

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DOI: 10.1145/2744769.2744910

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  - conf/dac/DaiKB15
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Yu-Yun Dai, Kei-Yong Khoo, Robert K. Brayton:
Sequential equivalence checking of clock-gated circuits. DAC 2015: 51:1-51:6

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