Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"FPGA Emulation of Through-Silicon-Via (TSV) Dataflow Network for 3D ..."

Takeshi Ohkawa, Masahiro Aoyagi (2023)

> Home

Details and statistics

DOI: 10.1109/COOLCHIPS57690.2023.10122025

access: closed

type: Conference or Workshop Paper

metadata version: 2023-05-22

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/coolchips/OhkawaA23
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/coolchips/OhkawaA23
Takeshi Ohkawa, Masahiro Aoyagi:
FPGA Emulation of Through-Silicon-Via (TSV) Dataflow Network for 3D Standard Chip Stacking System. COOL CHIPS 2023: 1-3

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.