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"ESD protection circuit for 8.5Gbps I/Os in 90nm CMOS technology."
Hossein Sarbishaei, Manoj Sachdev (2009)
- Hossein Sarbishaei, Manoj Sachdev:
ESD protection circuit for 8.5Gbps I/Os in 90nm CMOS technology. CICC 2009: 697-700
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