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"Design and implementation of high performance dynamic 64-bit parallel ..."

Wei Hwang et al. (1998)

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DOI: 10.1109/CICC.1998.695032

access: closed

type: Conference or Workshop Paper

metadata version: 2023-07-07

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Wei Hwang, George Diedrich Gristede, Pia N. Sanda, Shao Y. Wang, David F. Heidel:
Design and implementation of high performance dynamic 64-bit parallel adder with enhanced testability. CICC 1998: 519-522

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