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"A million gate PLD with 622 MHz I/O interface, multiple PLLs and high ..."

Sammy Cheung et al. (2000)

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DOI: 10.1109/CICC.2000.852636

access: closed

type: Conference or Workshop Paper

metadata version: 2022-10-10

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  - https://dblp.org/rec/conf/cicc/CheungCACGKKLOS00
Sammy Cheung, Kar Keng Chua, Boon Jin Ang, Thow Pang Chong, Wei Lian Goay, Wei Yee Koay, Sin Wo Kuan, Chooi Pei Lim, Jiunn Shyong Oon, Theam Thye See, Chiakang Sung, Kim Pin Tan, Yu Fong Tan, Choong Kit Wong:
A million gate PLD with 622 MHz I/O interface, multiple PLLs and high performance embedded CAM. CICC 2000: 143-146

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